Please define better what you call 32 cores?
Do ALL Altera Cyclone V E A9 have 32 cores? I mean 1 single chip as in on the evaluation board. So that we can figure out the cost for 1 day BF.
Is 1 single (Altera Cyclone V E A9 ) = 32 cores = 1 day BF full range.
This is important also. As many here see the FPGA Solution as a Modular System holding many chips or board with chips. But in fact 1 single chip in 1 board can do the job???
It seems I need to find a LOW cost EB with Altera Cyclone V E A9.
Let me also establish my line of thought. I know many will go for the lower cost EV so that they can start writing routines. Well that may work for many. But I do think is a waist of time. You will spend many hours of learning just to find your self time after time in a failure as you need more resources. Then when times comes to move to a new system you will find your self learning all over as the new system is different. So I am not ignoring your offer to go for a system like MAX10. It is just I had see this situation. At the moment I want to know what works, Then I start reading on that particular solution.
So Is 1 single (Altera Cyclone V E A9 ) = 32 cores = 1 day BF full range.
You will need to see a lot of youtube with "what are FPGA" and "FPGA tutorial" etc.
And please start with some very simple until you understand how you can have logic in a FPGA ... without any real logic
It's all small lookup tables where you program truetables of the logic in the LUT (S-RAM)
The FPGA have a huge routing system and a lot of latches (FlipFlops) and the you have the block ram's and some i/o
So back to your questions.
What is 1 core .... it's just like a function in normal programming langues, you define a block with some input and some output (in this case a whole BF) depending what inside this block it will use a number of resources
1 core of BF could have let's say
28 units of M10K BRAM
4,000 ALM
12,000 registers
This 1 core might run @200Mhz as pipeline so you will get an output result on every clk (remember all the registers in the 32 cores are clocked on every clk so the FPGA will actually need a small fan and a good PSU even it's only in the power area, with out you will destroy the FPGA)
1 core of BF gives then 200.000.000 results every sec and it the output = 0x00 0x00 0x001 you have a key which fit...
Sure you need to check this against the 2. set of input data
So
Is 1 single (Altera Cyclone V E A9 ) = 32 cores = 1 day BF full range.
NO! It's even better it will do a full search in 12 Hours
32 x 200.000.000 x 60 x 60 x 12= 276,480,000,000,000
2^48 = 281,474,976,710,656
So how many cores can you run in a FPGA.... only depends on the numbers of ALM / BRAM and registers
For the BF in a A9 there can be 32 + 1(for 2. check) cores + some control stuff ... there might have been 1 or 2 more cores in the FPGA ...but 32 are a magic number to spread ranges of search.
If you fill a FPGA 100% it will never be able to place / route the solution and maintain the speed at the same time
If you lets say wanted to do something else in the FPGA like BF MD5 or DES or something else your core would have a different size therefore you might have 100 cores in 1 chip or maybe only 2 cores it all depends on what's in the core, hope it makes sense
How fast?
Depend on the FPGA speed grade and model (faster = more cost)
I choose the A9 due to price / capacity and speed
Will it all happens in 1 chip (compared to dev board with many chip on) Yes it all happens in 1 FPGA chip + eeprom which does hare the code to load into the FPGA after power up (build into the MAX10) + some power supply chip's
For programming you will need a JTAG interface (the bigger dev board typical have it build in) to send the code to the FPGA / eeprom.
It might be interesting to have a look at
https://opencores.org/
