ce' un problema...pare che sia legato ad altra card o provider
13:43:41.050 viaccess: average decode time 1 ms
13:43:41.050 viaccess: ECM80 (0500:040810/36E3.0) from DVB0[DVBAPI3] inserted into queue
13:43:41.051 viaccess: ECM 0500:040810 42 bytes
13:43:41.051 viaccess: 80 70 27 00 90 03 04 08 18 E2 03 4C D2 01 EA 10
13:43:41.051 viaccess: 87 4C 8D C1 BC 91 FD F0 88 3A FE 12 C4 ED BE 2F
13:43:41.051 viaccess: F0 08 F6 3C C3 E5 E1 EC 32 4C
13:43:41.051 viaccess: ident=040818
13:43:41.051 viaccess: ECM_ID 0000, swap_cws = 0
13:43:41.051 viaccess: processDw->inputdcw: 87 4C 8D C1 BC 91 FD F0
13:43:41.051 viaccess: Via3x_Core->init indata: BC 91 FD F0 00 00 00 00
13:43:41.051 viaccess: Via3x_Core->final indata: C6 9A 70 F9 5E 8C B3 BA
13:43:41.051 viaccess: Via3x_Fct1: C6 9A 70 F9 BA 8C B3 5E
13:43:41.051 viaccess: Via3x_Core->init indata: 3D C0 3E 9F BA 8C B3 5E
13:43:41.051 viaccess: Via3x_Core->final indata: F1 E7 EC FD A8 34 8C D1
13:43:41.051 viaccess: Via3x_Fct2: F1 E7 EC FD D1 8C A8 34
13:43:41.051 viaccess: dcw->After data mixing: 6D 1D 55 C4 3D C0 3E 9F
13:43:41.051 viaccess: dcw->After 3Des: E1 4D A7 48 80 1B 56 A7
13:43:41.051 viaccess: Via3x_Core->init indata: 80 1B 56 A7 D1 8C A8 34
13:43:41.051 viaccess: Via3x_Core->final indata: 4C 3C 84 C5 C2 58 DC DE
13:43:41.051 viaccess: Via3x_Fct2: 4C 3C 84 C5 DE DC C2 58
13:43:41.052 viaccess: Via3x_Core->init indata: 3F 91 65 10 DE DC C2 58
13:43:41.052 viaccess: Via3x_Core->final indata: 45 9A E8 19 79 FD 17 12
13:43:41.052 viaccess: Via3x_Fct1: 45 9A E8 19 12 FD 17 79
13:43:41.052 viaccess: processDw->outputDW after data mixing: 92 E6 41 DE 3F 91 65 10
13:43:41.052 viaccess: processDw->inputdcw: 88 3A FE 12 C4 ED BE 2F
13:43:41.052 viaccess: Via3x_Core->init indata: C4 ED BE 2F 00 00 00 00
13:43:41.052 viaccess: Via3x_Core->final indata: BE E6 33 26 42 BD 7B 7E
13:43:41.052 viaccess: Via3x_Fct1: BE E6 33 26 7E BD 7B 42
13:43:41.052 viaccess: Via3x_Core->init indata: F6 87 85 50 7E BD 7B 42
13:43:41.052 viaccess: Via3x_Core->final indata: 3A A0 57 32 3D E3 4B F5
13:43:41.052 viaccess: Via3x_Fct2: 3A A0 57 32 F5 4B 3D E3
13:43:41.052 viaccess: dcw->After data mixing: 31 A6 83 CC F6 87 85 50
13:43:41.052 viaccess: dcw->After 3Des: A9 58 5B 90 85 B3 41 2F
13:43:41.052 viaccess: Via3x_Core->init indata: 85 B3 41 2F F5 4B 3D E3
13:43:41.052 viaccess: Via3x_Core->final indata: 49 94 93 4D D9 BA 77 2F
13:43:41.052 viaccess: Via3x_Fct2: 49 94 93 4D 2F 77 D9 BA
13:43:41.052 viaccess: Via3x_Core->init indata: 86 2F 82 2A 2F 77 D9 BA
13:43:41.052 viaccess: Via3x_Core->final indata: FC 24 0F 23 D9 44 C8 8B
13:43:41.053 viaccess: Via3x_Fct1: FC 24 0F 23 8B 44 C8 D9